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EDC Part-2
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       A circuit that increases the amplitude of the given input signal is an amplifier. A small a.c signal      fed to the amplifier is obtained as a larger a.c signal of the same frequency at the output.

       Amplifiers constitute an essential part of radio, television and other communication circuits. In discrete circuits, bipolar junction transistors and field effect transistors are commonly used as amplifying elements.

       In order to produce distortion free output in amplifier circuits, the supply voltages and resistances in the circuit must be suitably chosen. These voltages and resistances establish a set of d.c voltage Vceq and current Icq to operate the transistor in the active region. These voltages and currents are called quiescent values which determine the operating point or Q-point for the transistor. The process of giving proper supply voltages and resistances for obtaining the desired Q-point is called biasing. The circuits used for getting the desired and proper operating point are known as biasing circuits.




D.C. load line:


       Referring to the biasing circuit of fig 1(a), the values of Vcc and Rc are fixed and Ic and Vce are dependent on Rb.

       Applying kirchoff’s voltage law to the collector circuit in fig 1(a), we get Vcc=IcRc+Vce; the straight line represented by AB in fig 1(b) is called the d.c load line. The coordinates of the end point A are obtained by substituting Vce =0 in the above equation then Ic=Vcc/Rcc.Therefore, the coordinates of A are Vce=0 and Ic=Vcc/Rc.

       The coordinates of B are obtained by substituting Ic=0 in the above equation. Then Vce=Vcc.Therefore the coordinates of B are Vce=Vcc and Ic =0.Thus, the d.c load line AB ca be drawn if the values of Rc and Vcc are known.

       As shown in fig 1(b) the optimum Q-point is located at the mid point of the d.c load line AB between the saturation and cutoff regions i.e. is exactly midway between A and B .In order to get faithful amplification, the Q-point must be well within the active region of the transistor.

       It is very important to ensure that the operating point remains stable. If the Q-point shifts, the output voltage and current get clipped, thereby output signal is distorted.

       In practice the Q-point tends to shift its position due to any or all of the following three main factors;

    Reverse saturation current Ico which doubles for every 10c increase in temperature.

     Base-emitter voltage Vbe which decreases by 2.5mV per c.

    Transistor current gain b which increases with temperature.

       Parameters such as b vary over a range. In the output characteristics the spacing between the curves might increase or decrease which leads to the shifting of the Q-point to a location.

A.C. load line:


       After drawing the d.c. load line, the operating point Q is properly located at the center of the d.c. load line. This operating point is chosen under zero input signal condition of the circuit. Hence, the a.c.load line should also pass through the operating point Q.The effective a.c. load resistance Rac, is the combination of Rc parallel to RL,i.e.Rac=Rc// the slope of the a.c. load line CQD will be (-1/Rac).

       To draw an a.c. load line, two end points, maximum Vce and maximum Ic when the signal is applied are required. Maximum Vce=Vceq+IcqRac, which locates the point D (OD) on the Vce axis. Maximum Ic=Icq+Vceq/Rac, which locates the point C (OC) on the Ic axis. By joining points C and D, a.c. load line CD is constructed. As Rc>Rac, the d.c. load line is less steep than the a.c. load line.

       When the signal is zero, we have the exact d.c. conditions, from fig 1(b), it is clear that the intersection of d.c. and a.c. load lines is the operating point Q.  


Thermal Runway:

       The collector current for the CE circuit is given by Ic=bIb+(1+b)Ico.The three variables in the equation,b,Ib and Ico increase with rise in temperature .In particular, the reverse saturation current or leakage current Ico changes greatly with temperature. Specifically, it doubles for every 10c rise in temperature. The collector current Ic causes the collector-base junction temperature to rise which, inturn increase Ico, as a result Ic will increase still further, which will further rise the temperature at the collector-base junction. This process will become cumulative leading to “Thermal Runway”.



Stability Factor:

v          It is defined as the rate of change of collector current Ic with respect to the collector base leakage current Icbo, keeping both the current Ib and the current gain b constant.


      S=ΔIc/ΔIcbo          at constant Ib and b.

     Bias stability factor with respect to temperature is given by,

   ST =ΔIc/Icq       ΔT/T.


     Bias stability factor as a function of b is given by,

     Sb=ΔbcIcq / Δb/b.

     Bias stability factor may be alternatively expressed as,

S=1+b / 1-b(dIb/dIc)


 There are 3-methods commonly used for obtaining transistor biasing;

  Fixed bias or Base resistor method.

  Collector to base bias.

  Self-bias or Emitter bias.


  Stability factor S;

  For fixed bias S=1+b.

  For collector to base bias S=1+b / 1+b(Rc / Rc+Rb).

  For self-bias S=(b+1)    (Rb+Re) / Rb+Re(1+b).


  Thermal instability is greater for large values of S.

  In different biasing circuits, the stability of operating is achieved due to negative feedback action offered by the circuit.

  The negative feedback action reduces gain. If the loss in signal gain is not tolerable in a particular application, then compensating techniques are used to check the drift of the operating point.

  The bias compensation circuits use thermister and diodes.

  The junction power dissipation causes rise in junction temperature, which, in term, increases the collector current Ic.This rise in Ic is a cumulative process and is referred as thermal runaway, which may cause permanent damage to the transistor.

  Condition for thermal runaway is;

                Vcc-2Ic(Rc+Re)S x 0.07Ico<1/Q.

   Any transistor can be considered as a two-port cutwork.



   The parameters of transistor amplifiers, using h-parameters;

   AI = -hf  / 1+hoZL.


   Zi = hi+hr.AI.ZL.


   AV = AI.ZL / Zi.


   Zo = 1 / ho- (hrhf )/ hi+R S.


    AVS = AIZL  / Zi+R S.


     AI S = AIRS  / Zi+RS.


     AVS = AISZL  / RS.


    AP = AV.AI.


  Characteristics of CE amplifier:

   Large current gain (AI).

   Large voltage gain (AV).

   Large power gain (Ap=AI.AV).

   Voltage phase shift of 180.

   Moderate input impedance.

   Moderate output impedance.


  Characteristics of CC amplifier:

   High current gain.

   Voltage gain of approximately unity.

   Power gain approximately equal to current gain.

   No current or voltage phase shift.

   Large input impedance.

   Small output impedance.


  Characteristics of CB amplifier:

   Current gain of less than unity.

   High voltage gain.

   Power gain approximately  equal to voltage gain.

   No phase shift for current or voltage.

   Small input impedance.

   Large output impedance.



   RC coupled amplifier is a cascade using a resistor as a load impedance and a capacitor as the coupling element.

   Small signal amplifier provides linear amplification with minimum distortion.

   In mid-band frequency range of an amplifier, gain is mid-band range. In this range gain AL decreases with the decrease of frequency.

          Voltage gain AL = Am  / 1-j(fL / f).

          Where Am =mid-band gain, fL=lower 3dB frequency.

   High frequency range of an amplifier lies above the mid-band. In this range gain decreases with the increase in frequency.

AH = Am / 1+jf / fH.

Where fH = upper 3dB frequency.

   Bandwidth of an amplifier BW = fH –fL.





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